1. Field
The present disclosure herein relates to a method of manufacturing a capacitor of a semiconductor device and a capacitor of a semiconductor device manufactured by the same, and more particularly, to a method of manufacturing a semiconductor device which includes a metal-insulator-metal (MIM) capacitor and a semiconductor device manufactured by the same.
2. Description of the Related Art
A dynamic random access memory (DRAM) device, which is a sort of semiconductor memory devices, includes one transistor and one capacitor. Data storage capability of the DRAM is determined by a capacitance of the capacitor. However, as the semiconductor devices are developed to high integration, capacitors are required to have a high capacitance in a limited area.
In a DRAM device, the capacitance of the capacitor is proportional to a surface area of an electrode and a dielectric constant of a dielectric layer while being inversely proportional to an equivalent oxide thickness of the dielectric layer. Accordingly, in order to increase the capacitance of the capacitor within a limited area, a 3D capacitor may be provided so that a surface area of the electrode is increased. Also, the capacitance the capacitor may be increased by reducing the equivalent oxide thickness of the dielectric layer or by using a dielectric layer having a high dielectric constant.
The surface area of the electrode may be increased by increasing height of a lower electrode or a storage electrode, increasing an effective surface area of the lower electrode using a hemi-spherical grain (HSG), or using inner and outer surface areas of a cylinder by using a one cylinder storage (OCS) electrode.
The dielectric layer having a high dielectric constant may include a metal oxide layer such as TiO2 and Ta2O5, and a ferroelectric with a perovskite structure such as BaSrTiO3.